Uzunca bir dönemdir, çok büyük bir yoğunluk içindeyim. Bu sebepledir ki, bir türlü fırsat bulup yeni bir yazıya başlayamadım. Herhalde gün, bu gündür 🙂
Geleneksel olarak yine merhaba dünya yazımızın suyunu sıkma niyetindeyiz. Her ne kadar girizgah seviyesinde de olsa yazdığımız merhaba dünya yazısında, netleştirilmesi gereken bazı şeylerin olduğu aşikar. Bu yazı dizisinden önce Gömülü C yazı dizisinin okunmuş olmasını şiddetle tavsiye ediyorum.
Şimdi lafı uzatmadan, PIC’de yazdığımız ilk kodu hatırlayalım.
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#include <xc.h> void main(void) { TRISB=0; PORTB=1; while(1); } |
Bir kere şu xc.h’ı bir inceleyelim ne varmış içinde?
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#ifndef _XC_H_ #define _XC_H_ #ifdef __XC8 #include <htc.h> #endif #endif //_XC_H |
Gördüğünüz üzere, XC aslında MplabX Compiler anlamında yer alıyor ve kullandığımız platform 8 bitlik olduğundan, __XC8 etiketi sistemde tanımlı olduğundan (MplabX tarafından, biz projeyi oluşturduğumuzda otomatik tanımlanır) ilgili compiler header’ı çağırılmış. Bunun da “htc.h” olduğunu görüyoruz. Burada jeton düşüyor, hmm demek ki bu xc serisi, eski hi-tech C compiler’ın üzerine kurulmuş. Burnumuz bunun kokusunu aldı. Şimdi daha derine inelim; htc.h’ı açalım.
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#ifndef _HTC_H_ #define _HTC_H_ #if defined(__CCI__) && !defined(_XC_H_) #warning "CCI projects should use the top-level support file xc.hnIncluding xc.h instead" #include <xc.h> #endif #if !defined(__CCI__) && !defined(__IAR__) /* allow CCI definitions even when CCI option is not turned on */ #include <cci.h> #endif /* Definitions for _HTC_EDITION_ values */ #define __LITE__ 0 #define __STD__ 1 #define __PRO__ 2 /* common definitions */ #define ___mkstr1(x) #x #define ___mkstr(x) ___mkstr1(x) #define _OMNITARGET ((void *)0xFFFFFFFF) extern const char __xc8_OPTIM_SPEED; #include <xc8debug.h> /* HI-TECH PICC / PICC-Lite compiler */ #if defined(__PICC__) || defined(__PICCLITE__) #include <pic.h> #endif /* HI-TECH PICC-18 compiler */ #if defined(__PICC18__) #include <pic18.h> #endif /* MPLAB C18 Compatibility Header */ #ifdef __18CXX #include <pic18.h> #endif /* HI-TECH dsPICC compiler */ #if defined(__DSPICC__) #include <dspic.h> #endif /* HI-TECH C for PIC32 */ #if defined(__PICC32__) #include <pic32.h> #endif #endif |
Bu header dosyası sayesinde, projenin özelliklerine bakılarak jenerik olarak doğru header’ların seçilmesi sağlanıyor. Muhakkak ki bunların hepsi alt alta dallanıyor ancak şöyle kısaca bir özet geçelim. CCI denilen bir muhabbet var. The Common C Interface (CCI) kavramı, taşınabilir kod yazılabilmesi için ortaya atılmış güzel bir kavram. Ancak Microchip bence bu yarışta biraz geride kalmış. Yine de CCI’ya ileride değineceğim.
xc8debug.h ise, MplabX ide üzerinden yapılan debug işlerine yardımcı olan, çok çok basit bir header. Dolayısıyla üzerinde çok konuşmaya değmeyecek.
pic.h ise önemli. Çünkü derleyicinin bizim işlemcinin register tanımlarını aldığı kütüphane bu kütüphane. Bu iş nasıl oluyor? Biz projeyi yaratır iken, IDE bizim seçtiğimiz işlemciye göre gidip -D ile, compiler define yapıyor. Daha sonra pic.h gibi kütüphaneler bu bilgileri kullanarak, hangi mikrodenetleyicinin header’ının seçileceğine karar veriyor. Örneğin bizim seçimimizde IDE, bizim seçtiğimiz işlemciye göre -D_16F84A tanımını yaptı. Bu bilgiyi cebe atıp devam edelim. pic.h’ın içine bir bakalım.
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#ifndef _PIC_H_ #define _PIC_H_ #ifndef _HTC_H_ #include <htc.h> #endif #ifdef _HAS_OSCVAL_ extern unsigned char __osccal_val(void); #endif #include <pic_chip_select.h> /* MPLAB REAL-ICE related macros & includes (currently enhanced PICs only) */ #if defined(__DISABLE_REALICE_IT) || !defined(__MPLAB_REALICE__) || !defined(_PIC14E) #define __TRACE(id) /* TRACE disabled */ #define __LOG(id,value) /* LOG disabled */ #else #if defined(__MPLAB_REALICE__) #include <trace16.h> #endif #endif #define CLRWDT() asm("clrwdt") #define SLEEP() asm("sleep") // function version of nop #pragma intrinsic(__nop) extern void __nop(void); #define NOP() __nop() /* _nop() has been deprecated; use __nop() */ #define _nop() __nop() #define ASMOPT_ON() asm("opt asmopt_on") #define ASMOPT_OFF() asm("opt asmopt_off") // // Legacy Programming Macro Functions // #define __CONFIG(x) __config(___mkstr(__CONFIG), ___mkstr(pic), ___mkstr(x)) // Programs the lower 4 bits per ID location #define __IDLOC(w) __config(___mkstr(__IDLOC), ___mkstr(pic), ___mkstr(w)) // Variant of IDLOC for those devices that permit programming of the lower 7 bits per ID location #define __IDLOC7(a,b,c,d) __config(___mkstr(__IDLOC7), ___mkstr(pic), a, b, c, d) #define __PROG_CONFIG(a, x) __config(___mkstr(__PROG_CONFIG), ___mkstr(pic), a, x) #if !defined(_PIC14E) && !defined(_EEADRL) #define _EEADRL EEADR #else #define _EEADRL EEADRL #endif #if EEPROM_SIZE > 0 #define __EEPROM_DATA(a, b, c, d, e, f, g, h) asm("tpsect eeprom_data,class=EEDATA,delta=2,space=3,noexec"); asm("tdbt" ___mkstr(a) "," ___mkstr(b) "," ___mkstr(c) "," ___mkstr(d) "," ___mkstr(e) "," ___mkstr(f) "," ___mkstr(g) "," ___mkstr(h)) #endif /*********************************************************************** **** FLASH memory read/write/erase macros and function definitions **** *********************************************************************** * Notes: * __FLASHTYPE == 0 defined in devices that can only read flash memory - cannot write eg. 16F777 * __FLASHTYPE == 1 defined in traditional devices that can write 1 word at a time eg. 16F877 * __FLASHTYPE == 2 defined in devices that can only write in 4 word blocks eg. 16F877A * __FLASHTYPE == 3 defined in devices requiring 32-word block erasure before writing eg. 16F87 * __FLASHTYPE == undefined if device can neither read nor write program memory */ // macro FLASH_READ returns a word stored at a flash address #if defined(__FLASHTYPE) extern unsigned int flash_read(unsigned short addr); #if EEPROM_SIZE > 0 #define FLASH_READ(addr) (_EEADRL=(addr)&0xff, EEADRH=(addr)>>8, WREN=0, EECON1 |= 0x80, RD=1, NOP(), NOP(), (EEDATH << 8) | EEDATA) #else // FLASH_READ without EEPROM #define FLASH_READ(addr) (_EEADRL=(addr)&0xff, EEADRH=(addr)>>8, RD=1, NOP(), NOP(), (EEDATH << 8) | EEDATA) #endif #endif // end FLASH_READ // macro FLASH_WRITE used when writing only one word of data #if __FLASHTYPE==2 || __FLASHTYPE==3 /* * This is not available in this version. Contact HI-TECH support for more information. #define FLASH_WRITE(addr,data) do{ unsigned short x=data; flash_copy((const unsigned short *)&x,1,addr); }while(0) extern void flash_copy(const unsigned short * source_addr,unsigned char length,unsigned short dest_addr); */ #elif __FLASHTYPE==1 #define FLASH_WRITE(addr, value) _EEADRL=((addr)&0xff); EEADRH=((addr)>>8); EEDATH=((value)>>8); EEDATA=((value)&0xff); EECON1 |= 0x80; WREN=1; EECON2 = 0x55; EECON2 = 0xaa; WR=1; NOP(); NOP(); WREN=0 //extern void flash_copy(const unsigned short * source_addr,unsigned char length,unsigned short dest_addr); #endif // end FLASH_WRITE // macro FLASH_ERASE used to clear a 32-Byte sector of flash #if __FLASHTYPE==3 #define FLASH_ERASE(addr) while(WR)continue; _EEADRL=((addr)&0xFF); EEADRH=((addr>>8)&0xFF); EECON1=0x94; CARRY=0;if(GIE)CARRY=1;GIE=0; EECON2=0x55;EECON2=0xAA;WR=1; NOP(); if(CARRY)GIE=1 // library function version extern void flash_erase(unsigned short addr); #endif // end FLASH_ERASE #include <eeprom_routines.h> #ifdef __PICCPRO__ /****************************************************************/ /* Built-in delay routine */ /****************************************************************/ #pragma intrinsic(_delay) extern __nonreentrant void _delay(unsigned long); // NOTE: To use the macros below, YOU must have previously defined _XTAL_FREQ #define __delay_us(x) _delay((unsigned long)((x)*(_XTAL_FREQ/4000000.0))) #define __delay_ms(x) _delay((unsigned long)((x)*(_XTAL_FREQ/4000.0))) #endif /****************************************************************/ /****** Global interrupt enable/disable macro definitions *******/ /****************************************************************/ #if defined(_PIC14) || defined(_PIC14E) #ifndef ei #define ei() (GIE = 1) // interrupt enable bit #endif #if defined(_14000) || defined(_16C61) || defined(_16C62) || defined(_16C63) || defined(_16C63A) || defined(_16C64) || defined(_16C65) || defined(_16C65B) || defined(_16C71) || defined(_16C73) || defined(_16C73B) || defined(_16C74) || defined(_16C74B) || defined(_16C84) || defined(_16C745) || defined(_16C765) || defined(_16LC74B) #ifndef di #define di() { do { GIE = 0; } while ( GIE == 1 ); } // disable interrupt bit #endif #else #ifndef di #define di() (GIE = 0) // interrupt enable bit #endif #endif #endif /* The below reflect the state of TO and PD, respectively, which would otherwise be trashed by startup code. */ extern unsigned char __resetbits; extern __bit __powerdown; extern __bit __timeout; #endif /* _PIC_H */ |
Arkadaşlar sağolsunlar pic.h içinde bize yardımcı olabilecek çok sayıda şey tanımlamışlar. pic_chip_select.h tam olarak mikrokontrolör header’ı seçimini yapıyor ve onu mutlaka konuşacağız. Ancak sırayla buradaki bazı ibretlere bir değinelim. PIC16F84A; 68 byte RAM’i ve 1024 word’lük inanılmaz(!) FLASH belleği ile, hakikaten kısıtlı kaynaklı bir donanım olduğundan, dayılar haklı olarak LOG ve TRACE fonksiyonelitelerini kapatmışlar 🙂 Zira bu fonksiyoneliteleri kullanmaya kalksaydık, kaynakların çoğunu kullanmış olurduk.
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#define CLRWDT() asm("clrwdt") #define SLEEP() asm("sleep") |
Yukarıdaki etiketler, assembler komutlarını çağırarak sırasıyla watchdog timer’ı resetlemenin ve uyku moduna girmenin verimli implementasyonları olarak göze çarpıyor. Watchdog timer’ı resetlemek bazı arkadaşlara bir anlam ifade etmemiş olabilir. Mikrodenetleyici bir sebepten donarsa filan, reset atabilecek bir donanımın olması gerekiyor. Eğer mikrodenetleyicideki kod, belli aralıklarla watchdog timer’ın sayacını sıfırlamazsa, sayaç artıp taşar ve taştığı gibi mikrodenetleyiciye reset atar. Yerli yerinde kullanıldığında WDT (watchdog timer) candır 🙂 Sleep ise, mikrodenetleyiciyi düşük güç tüketimi moduna sokmanın güzel bir yoludur. Bu kısmı da ileride detaylıca ele alacağız.
ei(); ve di(); fonksiyonları ile sırasyla interrupt enable ve interrupt disable işleri kolaylaştırılmış. İleride detaylıca değineceğimiz kesme fonksiyonelitesinin aktive edilmesi ya da devre dışı bırakılması için bu makroları kullanmak mümkün 🙂 Diğer kısımlar zaten benzer. Öyleyse şimdi pic_chip_select.h kütüphanesinin bir kısmını inceleyelim. Gerisi de zaten aynı 😀
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... #ifdef _16F84 #ifdef _LEGACY_HEADERS #include <pic1684_legacy.h> #undef _HEADER_NOT_FOUND #else #include <pic16f84.h> #undef _HEADER_NOT_FOUND #endif #endif #ifdef _16F84A #ifdef _LEGACY_HEADERS #include <pic1684_legacy.h> #undef _HEADER_NOT_FOUND #else #include <pic16f84a.h> #undef _HEADER_NOT_FOUND #endif #endif ... |
Bu dosyada gördüğünüz gibi, IDE tarafından biz projeyi oluştururken tanımlanan etiketler kullanılarak doğru başlık dosyaları (header files) projeye dahil ediliyor yani çağırılıyor. Bu saydede biz xc.h dediğimizde, mikrokontrolör modeline göre, başlık dosyaları otomatik çağırılmış oluyor. Hmm, güzel 🙂 Öyleyse bir adım daha dalalım.
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// Version 1.34 // Generated 16/02/2015 GMT /* * Copyright © 2015, Microchip Technology Inc. and its subsidiaries ("Microchip") * All rights reserved. * * This software is developed by Microchip Technology Inc. and its subsidiaries ("Microchip"). * * Redistribution and use in source and binary forms, with or without modification, are * permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this list of * conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, this list * of conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. * * 3. Microchip's name may not be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MICROCHIP BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS; OR BUSINESS * INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef _PIC16F84A_H_ #define _PIC16F84A_H_ /* * C Header file for the Microchip PIC Microcontroller * PIC16F84A * */ #ifndef __XC8 #warning Header file pic16f84a.h included directly. Use #include <xc.h> instead. #endif /* * Register Definitions * */ // Register: INDF extern volatile unsigned char INDF @ 0x000; #ifndef _LIB_BUILD asm("INDF equ 00h"); #endif // Register: TMR0 extern volatile unsigned char TMR0 @ 0x001; #ifndef _LIB_BUILD asm("TMR0 equ 01h"); #endif // Register: PCL extern volatile unsigned char PCL @ 0x002; #ifndef _LIB_BUILD asm("PCL equ 02h"); #endif // Register: STATUS extern volatile unsigned char STATUS @ 0x003; #ifndef _LIB_BUILD asm("STATUS equ 03h"); #endif // bitfield definitions typedef union { struct { unsigned C :1; unsigned DC :1; unsigned Z :1; unsigned nPD :1; unsigned nTO :1; unsigned RP :2; unsigned IRP :1; }; struct { unsigned :5; unsigned RP0 :1; unsigned RP1 :1; }; struct { unsigned CARRY :1; }; struct { unsigned :2; unsigned ZERO :1; }; } STATUSbits_t; extern volatile STATUSbits_t STATUSbits @ 0x003; // bitfield macros #define _STATUS_C_POSN 0x0 #define _STATUS_C_POSITION 0x0 #define _STATUS_C_SIZE 0x1 #define _STATUS_C_LENGTH 0x1 #define _STATUS_C_MASK 0x1 #define _STATUS_DC_POSN 0x1 #define _STATUS_DC_POSITION 0x1 #define _STATUS_DC_SIZE 0x1 #define _STATUS_DC_LENGTH 0x1 #define _STATUS_DC_MASK 0x2 #define _STATUS_Z_POSN 0x2 #define _STATUS_Z_POSITION 0x2 #define _STATUS_Z_SIZE 0x1 #define _STATUS_Z_LENGTH 0x1 #define _STATUS_Z_MASK 0x4 #define _STATUS_nPD_POSN 0x3 #define _STATUS_nPD_POSITION 0x3 #define _STATUS_nPD_SIZE 0x1 #define _STATUS_nPD_LENGTH 0x1 #define _STATUS_nPD_MASK 0x8 #define _STATUS_nTO_POSN 0x4 #define _STATUS_nTO_POSITION 0x4 #define _STATUS_nTO_SIZE 0x1 #define _STATUS_nTO_LENGTH 0x1 #define _STATUS_nTO_MASK 0x10 #define _STATUS_RP_POSN 0x5 #define _STATUS_RP_POSITION 0x5 #define _STATUS_RP_SIZE 0x2 #define _STATUS_RP_LENGTH 0x2 #define _STATUS_RP_MASK 0x60 #define _STATUS_IRP_POSN 0x7 #define _STATUS_IRP_POSITION 0x7 #define _STATUS_IRP_SIZE 0x1 #define _STATUS_IRP_LENGTH 0x1 #define _STATUS_IRP_MASK 0x80 #define _STATUS_RP0_POSN 0x5 #define _STATUS_RP0_POSITION 0x5 #define _STATUS_RP0_SIZE 0x1 #define _STATUS_RP0_LENGTH 0x1 #define _STATUS_RP0_MASK 0x20 #define _STATUS_RP1_POSN 0x6 #define _STATUS_RP1_POSITION 0x6 #define _STATUS_RP1_SIZE 0x1 #define _STATUS_RP1_LENGTH 0x1 #define _STATUS_RP1_MASK 0x40 #define _STATUS_CARRY_POSN 0x0 #define _STATUS_CARRY_POSITION 0x0 #define _STATUS_CARRY_SIZE 0x1 #define _STATUS_CARRY_LENGTH 0x1 #define _STATUS_CARRY_MASK 0x1 #define _STATUS_ZERO_POSN 0x2 #define _STATUS_ZERO_POSITION 0x2 #define _STATUS_ZERO_SIZE 0x1 #define _STATUS_ZERO_LENGTH 0x1 #define _STATUS_ZERO_MASK 0x4 // Register: FSR extern volatile unsigned char FSR @ 0x004; #ifndef _LIB_BUILD asm("FSR equ 04h"); #endif // Register: PORTA extern volatile unsigned char PORTA @ 0x005; #ifndef _LIB_BUILD asm("PORTA equ 05h"); #endif // bitfield definitions typedef union { struct { unsigned RA0 :1; unsigned RA1 :1; unsigned RA2 :1; unsigned RA3 :1; unsigned RA4 :1; }; } PORTAbits_t; extern volatile PORTAbits_t PORTAbits @ 0x005; // bitfield macros #define _PORTA_RA0_POSN 0x0 #define _PORTA_RA0_POSITION 0x0 #define _PORTA_RA0_SIZE 0x1 #define _PORTA_RA0_LENGTH 0x1 #define _PORTA_RA0_MASK 0x1 #define _PORTA_RA1_POSN 0x1 #define _PORTA_RA1_POSITION 0x1 #define _PORTA_RA1_SIZE 0x1 #define _PORTA_RA1_LENGTH 0x1 #define _PORTA_RA1_MASK 0x2 #define _PORTA_RA2_POSN 0x2 #define _PORTA_RA2_POSITION 0x2 #define _PORTA_RA2_SIZE 0x1 #define _PORTA_RA2_LENGTH 0x1 #define _PORTA_RA2_MASK 0x4 #define _PORTA_RA3_POSN 0x3 #define _PORTA_RA3_POSITION 0x3 #define _PORTA_RA3_SIZE 0x1 #define _PORTA_RA3_LENGTH 0x1 #define _PORTA_RA3_MASK 0x8 #define _PORTA_RA4_POSN 0x4 #define _PORTA_RA4_POSITION 0x4 #define _PORTA_RA4_SIZE 0x1 #define _PORTA_RA4_LENGTH 0x1 #define _PORTA_RA4_MASK 0x10 // Register: PORTB extern volatile unsigned char PORTB @ 0x006; #ifndef _LIB_BUILD asm("PORTB equ 06h"); #endif // bitfield definitions typedef union { struct { unsigned RB0 :1; unsigned RB1 :1; unsigned RB2 :1; unsigned RB3 :1; unsigned RB4 :1; unsigned RB5 :1; unsigned RB6 :1; unsigned RB7 :1; }; } PORTBbits_t; extern volatile PORTBbits_t PORTBbits @ 0x006; // bitfield macros #define _PORTB_RB0_POSN 0x0 #define _PORTB_RB0_POSITION 0x0 #define _PORTB_RB0_SIZE 0x1 #define _PORTB_RB0_LENGTH 0x1 #define _PORTB_RB0_MASK 0x1 #define _PORTB_RB1_POSN 0x1 #define _PORTB_RB1_POSITION 0x1 #define _PORTB_RB1_SIZE 0x1 #define _PORTB_RB1_LENGTH 0x1 #define _PORTB_RB1_MASK 0x2 #define _PORTB_RB2_POSN 0x2 #define _PORTB_RB2_POSITION 0x2 #define _PORTB_RB2_SIZE 0x1 #define _PORTB_RB2_LENGTH 0x1 #define _PORTB_RB2_MASK 0x4 #define _PORTB_RB3_POSN 0x3 #define _PORTB_RB3_POSITION 0x3 #define _PORTB_RB3_SIZE 0x1 #define _PORTB_RB3_LENGTH 0x1 #define _PORTB_RB3_MASK 0x8 #define _PORTB_RB4_POSN 0x4 #define _PORTB_RB4_POSITION 0x4 #define _PORTB_RB4_SIZE 0x1 #define _PORTB_RB4_LENGTH 0x1 #define _PORTB_RB4_MASK 0x10 #define _PORTB_RB5_POSN 0x5 #define _PORTB_RB5_POSITION 0x5 #define _PORTB_RB5_SIZE 0x1 #define _PORTB_RB5_LENGTH 0x1 #define _PORTB_RB5_MASK 0x20 #define _PORTB_RB6_POSN 0x6 #define _PORTB_RB6_POSITION 0x6 #define _PORTB_RB6_SIZE 0x1 #define _PORTB_RB6_LENGTH 0x1 #define _PORTB_RB6_MASK 0x40 #define _PORTB_RB7_POSN 0x7 #define _PORTB_RB7_POSITION 0x7 #define _PORTB_RB7_SIZE 0x1 #define _PORTB_RB7_LENGTH 0x1 #define _PORTB_RB7_MASK 0x80 // Register: EEDATA extern volatile unsigned char EEDATA @ 0x008; #ifndef _LIB_BUILD asm("EEDATA equ 08h"); #endif // Register: EEADR extern volatile unsigned char EEADR @ 0x009; #ifndef _LIB_BUILD asm("EEADR equ 09h"); #endif // Register: PCLATH extern volatile unsigned char PCLATH @ 0x00A; #ifndef _LIB_BUILD asm("PCLATH equ 0Ah"); #endif // bitfield definitions typedef union { struct { unsigned PCLATH :5; }; } PCLATHbits_t; extern volatile PCLATHbits_t PCLATHbits @ 0x00A; // bitfield macros #define _PCLATH_PCLATH_POSN 0x0 #define _PCLATH_PCLATH_POSITION 0x0 #define _PCLATH_PCLATH_SIZE 0x5 #define _PCLATH_PCLATH_LENGTH 0x5 #define _PCLATH_PCLATH_MASK 0x1F // Register: INTCON extern volatile unsigned char INTCON @ 0x00B; #ifndef _LIB_BUILD asm("INTCON equ 0Bh"); #endif // bitfield definitions typedef union { struct { unsigned RBIF :1; unsigned INTF :1; unsigned T0IF :1; unsigned RBIE :1; unsigned INTE :1; unsigned T0IE :1; unsigned EEIE :1; unsigned GIE :1; }; struct { unsigned :2; unsigned TMR0IF :1; unsigned :2; unsigned TMR0IE :1; }; } INTCONbits_t; extern volatile INTCONbits_t INTCONbits @ 0x00B; // bitfield macros #define _INTCON_RBIF_POSN 0x0 #define _INTCON_RBIF_POSITION 0x0 #define _INTCON_RBIF_SIZE 0x1 #define _INTCON_RBIF_LENGTH 0x1 #define _INTCON_RBIF_MASK 0x1 #define _INTCON_INTF_POSN 0x1 #define _INTCON_INTF_POSITION 0x1 #define _INTCON_INTF_SIZE 0x1 #define _INTCON_INTF_LENGTH 0x1 #define _INTCON_INTF_MASK 0x2 #define _INTCON_T0IF_POSN 0x2 #define _INTCON_T0IF_POSITION 0x2 #define _INTCON_T0IF_SIZE 0x1 #define _INTCON_T0IF_LENGTH 0x1 #define _INTCON_T0IF_MASK 0x4 #define _INTCON_RBIE_POSN 0x3 #define _INTCON_RBIE_POSITION 0x3 #define _INTCON_RBIE_SIZE 0x1 #define _INTCON_RBIE_LENGTH 0x1 #define _INTCON_RBIE_MASK 0x8 #define _INTCON_INTE_POSN 0x4 #define _INTCON_INTE_POSITION 0x4 #define _INTCON_INTE_SIZE 0x1 #define _INTCON_INTE_LENGTH 0x1 #define _INTCON_INTE_MASK 0x10 #define _INTCON_T0IE_POSN 0x5 #define _INTCON_T0IE_POSITION 0x5 #define _INTCON_T0IE_SIZE 0x1 #define _INTCON_T0IE_LENGTH 0x1 #define _INTCON_T0IE_MASK 0x20 #define _INTCON_EEIE_POSN 0x6 #define _INTCON_EEIE_POSITION 0x6 #define _INTCON_EEIE_SIZE 0x1 #define _INTCON_EEIE_LENGTH 0x1 #define _INTCON_EEIE_MASK 0x40 #define _INTCON_GIE_POSN 0x7 #define _INTCON_GIE_POSITION 0x7 #define _INTCON_GIE_SIZE 0x1 #define _INTCON_GIE_LENGTH 0x1 #define _INTCON_GIE_MASK 0x80 #define _INTCON_TMR0IF_POSN 0x2 #define _INTCON_TMR0IF_POSITION 0x2 #define _INTCON_TMR0IF_SIZE 0x1 #define _INTCON_TMR0IF_LENGTH 0x1 #define _INTCON_TMR0IF_MASK 0x4 #define _INTCON_TMR0IE_POSN 0x5 #define _INTCON_TMR0IE_POSITION 0x5 #define _INTCON_TMR0IE_SIZE 0x1 #define _INTCON_TMR0IE_LENGTH 0x1 #define _INTCON_TMR0IE_MASK 0x20 // Register: OPTION_REG extern volatile unsigned char OPTION_REG @ 0x081; #ifndef _LIB_BUILD asm("OPTION_REG equ 081h"); #endif // bitfield definitions typedef union { struct { unsigned PS :3; unsigned PSA :1; unsigned T0SE :1; unsigned T0CS :1; unsigned INTEDG :1; unsigned nRBPU :1; }; struct { unsigned PS0 :1; unsigned PS1 :1; unsigned PS2 :1; }; } OPTION_REGbits_t; extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x081; // bitfield macros #define _OPTION_REG_PS_POSN 0x0 #define _OPTION_REG_PS_POSITION 0x0 #define _OPTION_REG_PS_SIZE 0x3 #define _OPTION_REG_PS_LENGTH 0x3 #define _OPTION_REG_PS_MASK 0x7 #define _OPTION_REG_PSA_POSN 0x3 #define _OPTION_REG_PSA_POSITION 0x3 #define _OPTION_REG_PSA_SIZE 0x1 #define _OPTION_REG_PSA_LENGTH 0x1 #define _OPTION_REG_PSA_MASK 0x8 #define _OPTION_REG_T0SE_POSN 0x4 #define _OPTION_REG_T0SE_POSITION 0x4 #define _OPTION_REG_T0SE_SIZE 0x1 #define _OPTION_REG_T0SE_LENGTH 0x1 #define _OPTION_REG_T0SE_MASK 0x10 #define _OPTION_REG_T0CS_POSN 0x5 #define _OPTION_REG_T0CS_POSITION 0x5 #define _OPTION_REG_T0CS_SIZE 0x1 #define _OPTION_REG_T0CS_LENGTH 0x1 #define _OPTION_REG_T0CS_MASK 0x20 #define _OPTION_REG_INTEDG_POSN 0x6 #define _OPTION_REG_INTEDG_POSITION 0x6 #define _OPTION_REG_INTEDG_SIZE 0x1 #define _OPTION_REG_INTEDG_LENGTH 0x1 #define _OPTION_REG_INTEDG_MASK 0x40 #define _OPTION_REG_nRBPU_POSN 0x7 #define _OPTION_REG_nRBPU_POSITION 0x7 #define _OPTION_REG_nRBPU_SIZE 0x1 #define _OPTION_REG_nRBPU_LENGTH 0x1 #define _OPTION_REG_nRBPU_MASK 0x80 #define _OPTION_REG_PS0_POSN 0x0 #define _OPTION_REG_PS0_POSITION 0x0 #define _OPTION_REG_PS0_SIZE 0x1 #define _OPTION_REG_PS0_LENGTH 0x1 #define _OPTION_REG_PS0_MASK 0x1 #define _OPTION_REG_PS1_POSN 0x1 #define _OPTION_REG_PS1_POSITION 0x1 #define _OPTION_REG_PS1_SIZE 0x1 #define _OPTION_REG_PS1_LENGTH 0x1 #define _OPTION_REG_PS1_MASK 0x2 #define _OPTION_REG_PS2_POSN 0x2 #define _OPTION_REG_PS2_POSITION 0x2 #define _OPTION_REG_PS2_SIZE 0x1 #define _OPTION_REG_PS2_LENGTH 0x1 #define _OPTION_REG_PS2_MASK 0x4 // Register: TRISA extern volatile unsigned char TRISA @ 0x085; #ifndef _LIB_BUILD asm("TRISA equ 085h"); #endif // bitfield definitions typedef union { struct { unsigned TRISA0 :1; unsigned TRISA1 :1; unsigned TRISA2 :1; unsigned TRISA3 :1; unsigned TRISA4 :1; }; } TRISAbits_t; extern volatile TRISAbits_t TRISAbits @ 0x085; // bitfield macros #define _TRISA_TRISA0_POSN 0x0 #define _TRISA_TRISA0_POSITION 0x0 #define _TRISA_TRISA0_SIZE 0x1 #define _TRISA_TRISA0_LENGTH 0x1 #define _TRISA_TRISA0_MASK 0x1 #define _TRISA_TRISA1_POSN 0x1 #define _TRISA_TRISA1_POSITION 0x1 #define _TRISA_TRISA1_SIZE 0x1 #define _TRISA_TRISA1_LENGTH 0x1 #define _TRISA_TRISA1_MASK 0x2 #define _TRISA_TRISA2_POSN 0x2 #define _TRISA_TRISA2_POSITION 0x2 #define _TRISA_TRISA2_SIZE 0x1 #define _TRISA_TRISA2_LENGTH 0x1 #define _TRISA_TRISA2_MASK 0x4 #define _TRISA_TRISA3_POSN 0x3 #define _TRISA_TRISA3_POSITION 0x3 #define _TRISA_TRISA3_SIZE 0x1 #define _TRISA_TRISA3_LENGTH 0x1 #define _TRISA_TRISA3_MASK 0x8 #define _TRISA_TRISA4_POSN 0x4 #define _TRISA_TRISA4_POSITION 0x4 #define _TRISA_TRISA4_SIZE 0x1 #define _TRISA_TRISA4_LENGTH 0x1 #define _TRISA_TRISA4_MASK 0x10 // Register: TRISB extern volatile unsigned char TRISB @ 0x086; #ifndef _LIB_BUILD asm("TRISB equ 086h"); #endif // bitfield definitions typedef union { struct { unsigned TRISB0 :1; unsigned TRISB1 :1; unsigned TRISB2 :1; unsigned TRISB3 :1; unsigned TRISB4 :1; unsigned TRISB5 :1; unsigned TRISB6 :1; unsigned TRISB7 :1; }; } TRISBbits_t; extern volatile TRISBbits_t TRISBbits @ 0x086; // bitfield macros #define _TRISB_TRISB0_POSN 0x0 #define _TRISB_TRISB0_POSITION 0x0 #define _TRISB_TRISB0_SIZE 0x1 #define _TRISB_TRISB0_LENGTH 0x1 #define _TRISB_TRISB0_MASK 0x1 #define _TRISB_TRISB1_POSN 0x1 #define _TRISB_TRISB1_POSITION 0x1 #define _TRISB_TRISB1_SIZE 0x1 #define _TRISB_TRISB1_LENGTH 0x1 #define _TRISB_TRISB1_MASK 0x2 #define _TRISB_TRISB2_POSN 0x2 #define _TRISB_TRISB2_POSITION 0x2 #define _TRISB_TRISB2_SIZE 0x1 #define _TRISB_TRISB2_LENGTH 0x1 #define _TRISB_TRISB2_MASK 0x4 #define _TRISB_TRISB3_POSN 0x3 #define _TRISB_TRISB3_POSITION 0x3 #define _TRISB_TRISB3_SIZE 0x1 #define _TRISB_TRISB3_LENGTH 0x1 #define _TRISB_TRISB3_MASK 0x8 #define _TRISB_TRISB4_POSN 0x4 #define _TRISB_TRISB4_POSITION 0x4 #define _TRISB_TRISB4_SIZE 0x1 #define _TRISB_TRISB4_LENGTH 0x1 #define _TRISB_TRISB4_MASK 0x10 #define _TRISB_TRISB5_POSN 0x5 #define _TRISB_TRISB5_POSITION 0x5 #define _TRISB_TRISB5_SIZE 0x1 #define _TRISB_TRISB5_LENGTH 0x1 #define _TRISB_TRISB5_MASK 0x20 #define _TRISB_TRISB6_POSN 0x6 #define _TRISB_TRISB6_POSITION 0x6 #define _TRISB_TRISB6_SIZE 0x1 #define _TRISB_TRISB6_LENGTH 0x1 #define _TRISB_TRISB6_MASK 0x40 #define _TRISB_TRISB7_POSN 0x7 #define _TRISB_TRISB7_POSITION 0x7 #define _TRISB_TRISB7_SIZE 0x1 #define _TRISB_TRISB7_LENGTH 0x1 #define _TRISB_TRISB7_MASK 0x80 // Register: EECON1 extern volatile unsigned char EECON1 @ 0x088; #ifndef _LIB_BUILD asm("EECON1 equ 088h"); #endif // bitfield definitions typedef union { struct { unsigned RD :1; unsigned WR :1; unsigned WREN :1; unsigned WRERR :1; unsigned EEIF :1; }; } EECON1bits_t; extern volatile EECON1bits_t EECON1bits @ 0x088; // bitfield macros #define _EECON1_RD_POSN 0x0 #define _EECON1_RD_POSITION 0x0 #define _EECON1_RD_SIZE 0x1 #define _EECON1_RD_LENGTH 0x1 #define _EECON1_RD_MASK 0x1 #define _EECON1_WR_POSN 0x1 #define _EECON1_WR_POSITION 0x1 #define _EECON1_WR_SIZE 0x1 #define _EECON1_WR_LENGTH 0x1 #define _EECON1_WR_MASK 0x2 #define _EECON1_WREN_POSN 0x2 #define _EECON1_WREN_POSITION 0x2 #define _EECON1_WREN_SIZE 0x1 #define _EECON1_WREN_LENGTH 0x1 #define _EECON1_WREN_MASK 0x4 #define _EECON1_WRERR_POSN 0x3 #define _EECON1_WRERR_POSITION 0x3 #define _EECON1_WRERR_SIZE 0x1 #define _EECON1_WRERR_LENGTH 0x1 #define _EECON1_WRERR_MASK 0x8 #define _EECON1_EEIF_POSN 0x4 #define _EECON1_EEIF_POSITION 0x4 #define _EECON1_EEIF_SIZE 0x1 #define _EECON1_EEIF_LENGTH 0x1 #define _EECON1_EEIF_MASK 0x10 // Register: EECON2 extern volatile unsigned char EECON2 @ 0x089; #ifndef _LIB_BUILD asm("EECON2 equ 089h"); #endif /* * Bit Definitions * */ #define _DEPRECATED __attribute__((__deprecated__)) #ifndef BANKMASK #define BANKMASK(addr) ((addr)&07Fh) #endif extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0; #define CARRY_bit BANKMASK(STATUS), 0 extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1; #define DC_bit BANKMASK(STATUS), 1 extern volatile __bit EEIE @ (((unsigned) &INTCON)*8) + 6; #define EEIE_bit BANKMASK(INTCON), 6 extern volatile __bit EEIF @ (((unsigned) &EECON1)*8) + 4; #define EEIF_bit BANKMASK(EECON1), 4 extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7; #define GIE_bit BANKMASK(INTCON), 7 extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4; #define INTE_bit BANKMASK(INTCON), 4 extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6; #define INTEDG_bit BANKMASK(OPTION_REG), 6 extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1; #define INTF_bit BANKMASK(INTCON), 1 extern volatile __bit IRP @ (((unsigned) &STATUS)*8) + 7; #define IRP_bit BANKMASK(STATUS), 7 extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0; #define PS0_bit BANKMASK(OPTION_REG), 0 extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1; #define PS1_bit BANKMASK(OPTION_REG), 1 extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2; #define PS2_bit BANKMASK(OPTION_REG), 2 extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3; #define PSA_bit BANKMASK(OPTION_REG), 3 extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0; #define RA0_bit BANKMASK(PORTA), 0 extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1; #define RA1_bit BANKMASK(PORTA), 1 extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2; #define RA2_bit BANKMASK(PORTA), 2 extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3; #define RA3_bit BANKMASK(PORTA), 3 extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4; #define RA4_bit BANKMASK(PORTA), 4 extern volatile __bit RB0 @ (((unsigned) &PORTB)*8) + 0; #define RB0_bit BANKMASK(PORTB), 0 extern volatile __bit RB1 @ (((unsigned) &PORTB)*8) + 1; #define RB1_bit BANKMASK(PORTB), 1 extern volatile __bit RB2 @ (((unsigned) &PORTB)*8) + 2; #define RB2_bit BANKMASK(PORTB), 2 extern volatile __bit RB3 @ (((unsigned) &PORTB)*8) + 3; #define RB3_bit BANKMASK(PORTB), 3 extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4; #define RB4_bit BANKMASK(PORTB), 4 extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5; #define RB5_bit BANKMASK(PORTB), 5 extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6; #define RB6_bit BANKMASK(PORTB), 6 extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7; #define RB7_bit BANKMASK(PORTB), 7 extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3; #define RBIE_bit BANKMASK(INTCON), 3 extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0; #define RBIF_bit BANKMASK(INTCON), 0 extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0; #define RD_bit BANKMASK(EECON1), 0 extern volatile __bit RP0 @ (((unsigned) &STATUS)*8) + 5; #define RP0_bit BANKMASK(STATUS), 5 extern volatile __bit RP1 @ (((unsigned) &STATUS)*8) + 6; #define RP1_bit BANKMASK(STATUS), 6 extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5; #define T0CS_bit BANKMASK(OPTION_REG), 5 extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5; #define T0IE_bit BANKMASK(INTCON), 5 extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2; #define T0IF_bit BANKMASK(INTCON), 2 extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4; #define T0SE_bit BANKMASK(OPTION_REG), 4 extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5; #define TMR0IE_bit BANKMASK(INTCON), 5 extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2; #define TMR0IF_bit BANKMASK(INTCON), 2 extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0; #define TRISA0_bit BANKMASK(TRISA), 0 extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1; #define TRISA1_bit BANKMASK(TRISA), 1 extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2; #define TRISA2_bit BANKMASK(TRISA), 2 extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3; #define TRISA3_bit BANKMASK(TRISA), 3 extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4; #define TRISA4_bit BANKMASK(TRISA), 4 extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0; #define TRISB0_bit BANKMASK(TRISB), 0 extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1; #define TRISB1_bit BANKMASK(TRISB), 1 extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2; #define TRISB2_bit BANKMASK(TRISB), 2 extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3; #define TRISB3_bit BANKMASK(TRISB), 3 extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4; #define TRISB4_bit BANKMASK(TRISB), 4 extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5; #define TRISB5_bit BANKMASK(TRISB), 5 extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6; #define TRISB6_bit BANKMASK(TRISB), 6 extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7; #define TRISB7_bit BANKMASK(TRISB), 7 extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1; #define WR_bit BANKMASK(EECON1), 1 extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2; #define WREN_bit BANKMASK(EECON1), 2 extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3; #define WRERR_bit BANKMASK(EECON1), 3 extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2; #define ZERO_bit BANKMASK(STATUS), 2 extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3; #define nPD_bit BANKMASK(STATUS), 3 extern volatile __bit nRBPU @ (((unsigned) &OPTION_REG)*8) + 7; #define nRBPU_bit BANKMASK(OPTION_REG), 7 extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4; #define nTO_bit BANKMASK(STATUS), 4 #endif // _PIC16F84A_H_ |
Burada, tüm register tanımlarının nasıl yapıldığına dikkat ediniz 🙂 Bizim Gömülü C yazı dizisini tamamen okuyan herkes için burada ne yapıldığını anlamak kolay olacaktır. Yine de anlamadığınız yerler olursa sorunuz 🙂 Şimdi merhaba dünya kodumuzdaki register’ları özellikle inceleyelim.
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... // Register: PORTB extern volatile unsigned char PORTB @ 0x006; #ifndef _LIB_BUILD asm("PORTB equ 06h"); #endif ... // Register: TRISB extern volatile unsigned char TRISB @ 0x086; #ifndef _LIB_BUILD asm("TRISB equ 086h"); #endif |
Burada demişler ki PORTB diye bir değişken yaratıyoruz ve bu bellekteki 0x006 numaralı adrese karşılık düşüyor. Yine benzer şekilde TRISB diye bir değişken yaratıyoruz ve bu bellekteki 0x086 numaralı adrese karşılık düşüyor. Bu bilgileri datasheet’teki bellek haritasından aynen doğrulamak mümkün. Zaten oradan bakıp yazmışlar 🙂 Ama ayıbetmişler… Çünkü tüm register’lar için kafadan değişken tanımlanmış. Bu, ödemesi ağır bir bedel. Ayrıca @ operatörü standart bir operatör değil. Dolayısıyla bu tanımlar, platform bağımlılığı yaratmakta ve kodların taşınabilirliğini negatif etkilemekte. Bunlara bir ayar çekmemiz kaçınılmaz duruyor 🙂
Şimdi, bu noktaya geldikten sonra, geleneğimizi uygulayalım ve yine header kullanmaksızın merhaba dünya kodumuzu yeniden yazalım 🙂
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#define myTRISB (*( volatile unsigned char*)0x086) #define myPORTB (*( volatile unsigned char*)0x006) void main() { myTRISB = 0; myPORTB = 1; while(1); } |
Gördüğünüz üzere, kodda ne bir kütüphane kullandık, ne de bir değişken! Zaten kodumuzda, merhaba dünya kodundaki gereksiz şeylerin hiç birisi yok. Register tanımlarını da çok çok daha verimli şekilde yaptığımızı gururla huzurlarınıza sunarım 🙂 0 byte değişken kullanarak, yine ledimizi yaktık!
Buradan gerekli ibretleri lütfen alalım 🙂 Sanıyorum ki, “Abi PIC programlama yaparken Hi-Tech compiler CSS’den iyiymiş yaa” filan gibi geyiklere artık bolca gülersiniz. Hiçbirine ihtiyacımız yok, sadece tekerleği yeniden icad etmemek için onları araç olarak kullanıyoruz 😉
Sonraki yazımda bu temellerin üzerine, giriş çıkış işlemleriyle ilgili detaylı bir yapı inşa etmeyi planlıyorum. Dilerim sizler için de faydalı ve eğlenceli bir yazı olmuştur.
Şimdi devam…
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